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general description the max5487/max5488/max5489 dual, linear-taper, digital potentiometers function as mechanical poten- tiometers with a simple 3-wire spi-compatible digital interface that programs the wipers to any one of 256 tap positions. these digital potentiometers feature a nonvolatile memory (eeprom) to return the wipers to their previously stored positions upon power-up. the max5487 has an end-to-end resistance of 10k ? , while the max5488 and max5489 have resistances of 50k ? and 100k ? , respectively. these devices have a low 35ppm/? end-to-end temperature coefficient, and operate from a single +2.7v to +5.25v supply. the max5487/max5488/max5489 are available in 16-pin 3mm x 3mm x 0.8mm tqfn or 14-pin tssop packages. each device is guaranteed over the extended -40 c to +85 c temperature range. applications lcd screen adjustment audio volume control mechanical potentiometer replacement low-drift programmable filters low-drift programmable-gain amplifiers features wiper position stored in nonvolatile memory (eeprom) and recalled upon power-up or recalled by an interface command 3mm x 3mm x 0.8mm, 16-pin tqfn or 14-pin tssop packages 1 lsb inl, 0.5 lsb dnl (voltage-divider mode) 256 tap positions 35ppm/c end-to-end resistance temperature coefficient 5ppm/c ratiometric temperature coefficient 10k?, 50k?, and 100k? end-to-end resistance values spi-compatible serial interface reliability 200,000 wiper store cycles 50-year wiper data retention +2.7v to +5.25v single-supply operation max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers ________________________________________________________________ maxim integrated products 1 19-3478; rev 4; 4/10 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available spi is a trademark of motorola, inc. ordering information part temp range pin-package end-to-end resistance (k ? ) top mark max5487 ete+ -40? to +85? 16 tqfn-ep* 10 abr max5487eud+ -40? to +85? 14 tssop 10 * ep = exposed pad. + denotes a lead(pb)-free/rohs-compliant package. max5487 max5488 max5489 por 8-bit latch 16-bit nv ram sclk din cs decoder 8 8 256 decoder 256 ha wa la hb wb lb v dd gnd spi interface 8-bit latch functional diagram 15 16 14 13 5 *ep *exposed pad. 6 7 din cs 8 v dd lb n.c. hb 1 + 3 wa 4 12 10 9 ha i.c. i.c. gnd n.c. n.c. max5487 max5488 max5489 sclk wb 2 11 la tqfn 3mm x 3mm top view pin configurations pin configurations continued at end of data sheet. ordering information continued at end of data sheet.
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v dd to gnd ...........................................................-0.3v to +6.0v all other pins to gnd......................-0.3v to the lower of (v dd + 0.3v) and +6.0v maximum continuous current into h_, w_, and l_ max5487...................................................................... 5.0ma max5488...................................................................... 1.3ma max5489...................................................................... 0.6ma continuous power dissipation (t a = +70 c) 16-pin tqfn (derate 17.5mw/ c above +70 c) .......... 1398mw 14-pin tssop (derate 9.1mw/ c above +70 c)............. 727mw operating temperature range ...........................-40 c to +85 c junction temperature ......................................................+150 c storage temperature range .............................-60 c to +150 c lead temperature (soldering, 10s) .................................+300 c soldering temperature (reflow) .......................................+260 c dc electrical characteristics (v dd = +2.7v to +5.25v, v h = v dd , v l = gnd, t a = -40 c to +85 c, unless otherwise noted. typical values are at v dd = +5.0v, t a = +25 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units dc performance (voltage-divider mode, figure 1) resolution n 256 taps integral nonlinearity inl (note 2) ? lsb differential nonlinearity dnl (note 2) ?.5 lsb dual-code matching register a = register b 2 lsb end-to-end resistor tempco tc r 35 ppm/? ratiometric resistor tempco 5 ppm/? max5487 3.5 6 max5488 -0.6 +1.2 full-scale error max5489 -0.3 +1.2 lsb max5487 3.5 6 max5488 -0.6 1.5 zero-scale error max5489 0.3 1 lsb dc performance (variable-resistor mode, figure 1) resolution 256 taps v dd = 5.0v ?.5 integral nonlinearity (note 3) v dd = 3.0v ? lsb v dd = 5.0v ? differential nonlinearity (note 3) v dd = 3.0v ? lsb dc performance (resistor characteristics) v dd = 5.0v 200 350 wiper resistance (note 4) r w v dd = 3.0v 325 675 ? wiper capacitance c w 50 pf max5487 7.5 10 12.5 max5488 37.5 50 62.5 end-to-end resistance r hl max5489 75 100 125 k ?
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers _______________________________________________________________________________________ 3 dc electrical characteristics (continued) (v dd = +2.7v to +5.25v, v h = v dd , v l = gnd, t a = -40 c to +85 c, unless otherwise noted. typical values are at v dd = +5.0v, t a = +25 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units digital inputs v dd = 3.6v to 5.25v 2.4 input high voltage (note 5) v ih v dd = 2.7v to 3.6v 0.7 x v dd v input low voltage v il v dd = 2.7v to 5.25v (note 5) 0.8 v input leakage current i in ?.0 a input capacitance c in 5.0 pf ac performance crosstalk f h_ = 1khz, l_ = gnd, measurement at w_ (note 6) -90 db max5487 350 max5488 90 -3db bandwidth bw wiper at midscale c w_ = 10pf max5489 45 khz total harmonic distortion thd v h_ = 1v rms at 1khz, l_ = gnd, measurement at w_ 0.02 % timing characteristics (analog) max5487 0.5 max5488 0.75 wiper-settling time t s code 0 to 127 (note 7) max5489 1.5 ? timing characteristics (digital, figure 2, note 8) sclk frequency 5 mhz sclk clock period t cp 200 ns sclk pulse-width high t ch 80 ns sclk pulse-width low t cl 80 ns cs fall to sclk rise setup t css 80 ns sclk rise to cs rise hold t csh 0ns din to sclk setup t ds 50 ns din hold after sclk t dh 0ns sclk rise to cs fall delay t cs0 20 ns cs rise to sclk rise hold t cs1 80 ns cs pulse-width high t csw 200 ns write nv register busy time t busy 12 ms read nv register access time t acc 1s w r i te w i p er reg i ster to o utp ut d el ay t wo 1s nonvolatile memory reliability data retention t a = +85? 50 years t a = +25? 200,000 endurance t a = +85? 50,000 stores
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers 4 _______________________________________________________________________________________ note 1: all devices are production tested at t a = +85? and are guaranteed by design and characterization for -40? < t a < +85?. note 2: dnl and inl are measured with the potentiometer configured as a voltage-divider with h_ = v dd and l_ = 0. the wiper terminal is unloaded and measured with an ideal voltmeter. note 3: dnl and inl are measured with the potentiometer configured as a variable resistor. h_ is unconnected and l_ = 0. for v dd = +5v, the wiper terminal is driven with a source current of 400? for the 10k ? configuration, 80? for the 50k ? configuration, and 40? for the 100k ? configuration. for v dd = +3v, the wiper terminal is driven with a source current of 200? for the 10k ? configuration, 40? for the 50k ? configuration, and 20? for the 100k ? configuration. note 4: the wiper resistance is the worst value measured by injecting the currents given in note 3 into w_ with l_ = gnd. r w = (v w - v h ) / i w . note 5: the device draws higher supply current when the digital inputs are driven with voltages between (v dd - 0.5v) and (gnd + 0.5v). see supply current vs. digital input voltage in the typical operating characteristics section. note 6: wiper at midscale with a 10pf load. note 7: wiper-settling time is the worst-case 0-to-50% rise time, measured between tap 0 and tap 127. h_ = v dd , l_ = gnd, and the wiper terminal is unloaded and measured with a 10pf oscilloscope probe (see tap-to-tap switching transient in the typical operating characteristics section). note 8: digital timing is guaranteed by design and characterization, and is not production tested. dc electrical characteristics (continued) (v dd = +2.7v to +5.25v, v h = v dd , v l = gnd, t a = -40 c to +85 c, unless otherwise noted. typical values are at v dd = +5.0v, t a = +25 c, unless otherwise noted.) (note 1) parameter symbol conditions min typ max units power supplies power-supply voltage v dd 2.70 5.25 v supply current i dd during write cycle only, digital inputs = v dd or gnd 400 ? standby current digital inputs = v dd or gnd, t a = +25? 0.5 1 a h l w voltage-divider configuration variable-resistor configuration h l figure 1. voltage-divider/variable-resistor configurations
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers _______________________________________________________________________________________ 5 0.1 0 -40-20 0204060 80 0.5 0.4 0.3 0.2 0.6 temperature ( c) supply current ( a) supply current vs. temperature max5487-89 toc01 v dd = 3v v dd = 5v supply current vs. digital input voltage max5487-89 toc02 digital input voltage (v) supply current ( a) 4 3 2 1 1 10 100 1000 10,000 0 05 v cc = 5v v cc = 3v 0 50 150 100 200 250 06496 32 128 160 192 224 256 wiper resistance vs. tap position max5487-89 toc03 tap position wiper resistance ( ? ) 1 s/div tap-to-tap switching transient (max5487) cs 2.0v/div wiper 20mv/div max5487-89 toc04 v h_ = 5.0v tap-to-tap switching transient (max5488) max5487-89 toc05 1.0 s/div wiper 20mv/div v h_ = 5.0v cs 2.0v/div wiper transient at power-on max5487-89 toc07 2.0 s/div wiper 2.0v/div v h_ = v dd v dd 2.0v/div frequency (khz) gain (db) midscale frequency response (max5487) 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 0.1 1 10 100 1000 max5487-89 toc08 c w = 10pf c w_ = 50pf tap-to-tap switching transient (max5489) max5487-89 toc06 1.0 s/div wiper 20mv/div v h_ = 5.0v cs 2.0v/div typical operating characteristics (v dd = +5.0v, t a = +25 c, unless otherwise noted.)
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers 6 _______________________________________________________________________________________ variable-resistor inl vs. tap position (max5488) max5487-89 toc12 tap position inl (lsb) 224 192 32 64 96 128 160 -0.6 -0.8 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0256 -0.20 -0.10 -0.15 0 -0.05 0.05 0.10 0.15 0.20 06496 32 128 160 192 224 256 voltage-divider dnl vs. tap position (max5487) max5487-89 toc13 tap position dnl (lsb) voltage-divider dnl vs. tap position (max5488) max5487-89 toc15 tap position dnl (lsb) 224 192 32 64 96 128 160 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 -0.20 0256 voltage-divider inl vs. tap position (max5488) max5487-89 toc16 tap position inl (lsb) 224 192 32 64 96 128 160 -0.6 -0.8 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 256 0.6 0.2 0.4 0.2 0 0.6 0.4 0.8 1.2 1.0 1.4 06496 32 128 160 192 224 256 voltage-divider inl vs. tap position (max5487) max5487-89 toc14 tap position inl (lsb) typical operating characteristics (continued) (v dd = +5.0v, t a = +25 c, unless otherwise noted.) midscale frequency response (max5488) max5487-89 toc09 frequency (khz) gain (db) 100 10 1 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 -50 0.1 1000 c w_ = 10pf c w_ = 50pf midscale frequency response (max5489) max5487-89 toc10 frequency (khz) gain (db) 100 10 1 -45 -40 -35 -30 -25 -20 -15 -10 -5 0 -50 0.1 1000 c w_ = 10pf c w_ = 50pf variable-resistor dnl vs. tap position (max5488) max5487-89 toc11 tap position dnl (lsb) 224 192 32 64 96 128 160 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 -0.20 0256
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers _______________________________________________________________________________________ 7 variable-resistor dnl vs. tap position (max5489) max5487-89 toc17 tap position dnl (lsb) 224 192 32 64 96 128 160 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 -0.20 0256 voltage-divider inl vs. tap position (max5489) max5487-89 toc20 tap position inl (lsb) 224 192 32 64 96 128 160 -0.6 -0.8 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0256 variable-resistor inl vs. tap position (max5489) max5487-89 toc18 tap position inl (lsb) 224 192 32 64 96 128 160 -0.6 -0.8 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1.0 -1.0 0 256 voltage-divider dnl vs. tap position (max5489) max5487-89 toc19 tap position dnl (lsb) 224 192 32 64 96 128 160 -0.15 -0.10 -0.05 0 0.05 0.10 0.15 0.20 -0.20 0256 -0.010 -0.004 -0.006 -0.008 -0.002 0 0.002 0.004 0.006 0.008 0.010 -40 10 -15 356085 end-to-end resistance change vs. temperature (max5487) max5487-89 toc22 temperature ( c) resistance change (%) -100 -80 -90 -60 -70 -40 -50 -30 crosstalk vs. frequency max5487-89 toc21 frequency (khz) crosstalk (db) 0.1 1 10 100 1000 max5487 max5488 max5489 c w_ = 10pf -0.010 -0.004 -0.006 -0.008 -0.002 0 0.002 0.004 0.006 0.008 0.010 -40 10 -15 35 60 85 end-to-end resistance change vs. temperature (max5488) max5487-89 toc23 temperature ( c) resistance change (%) -0.010 -0.004 -0.006 -0.008 -0.002 0 0.002 0.004 0.006 0.008 0.010 -40 10 -15 35 60 85 end-to-end resistance change vs. temperature (max5489) max5487-89 toc24 temperature ( c) resistance change (%) typical operating characteristics (continued) (v dd = +5.0v, t a = +25 c, unless otherwise noted.)
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers 8 _______________________________________________________________________________________ detailed description the max5487/max5488/max5489 contain two resistor arrays, with 255 resistive elements each. the max5487 has an end-to-end resistance of 10k ? , while the max5488 and max5489 have resistances of 50k ? and 100k ? , respectively. the max5487/max5488/max5489 allow access to the high, low, and wiper terminals on both potentiometers for a standard voltage-divider con- figuration. connect the wiper to the high terminal, and connect the low terminal to ground, to make the device a variable resistor (see figure 1). a simple 3-wire serial interface programs either wiper directly to any of the 256 tap points. the nonvolatile memory stores the wiper position prior to power-down and recalls the wiper to the same point upon power-up or by using an interface command (see table 1). the nonvolatile memory is guaranteed for 200,000 wiper store cycles and 50 years for wiper data retention. spi digital interface the max5487/max5488/max5489 use a 3-wire spi- compatible serial data interface (figures 2 and 3). this write-only interface contains three inputs: chip-select ( cs ), data clock (sclk), and data in (din). drive cs low to enable the serial interface and clock data synchro- nously into the shift register on each sclk rising edge. the write commands (c1, c0 = 00 or 01) require 16 clock cycles to clock in the command, address, and data (figure 3a). the copy commands (c1, c0 = 10, 11) can use either eight clock cycles to transfer only command and address bits (figure 3b) or 16 clock cycles, with the device disregarding 8 data bits (figure 3a). after loading data into the shift register, drive cs high to latch the data into the appropriate potentiometer control register and disable the serial interface. keep cs low during the entire serial data stream to avoid cor- ruption of the data. digital-interface format the data format consists of three elements: command bits, address bits, and data bits (see table 1 and figure 3). the command bits (c1 and c0) indicate the action to be taken such as changing or storing the wiper position. the address bits (a1 and a0) specify which potentiometer the command affects and the 8 data bits (d7 to d0) specify the wiper position. pin tqfn tssop name function 114v dd power supply. bypass v dd to gnd with a 0.1? capacitor as close to the device as possible. 2 13 sclk serial-interface clock input 3 12 din serial-interface data input 411 cs active-low chip-select digital input 5, 6, 9 7, 9, 10 n.c. no connection. not internally connected. 7 8 gnd ground 8, 16 i.c. internally connected to ep. leave unconnected. 10 6 lb low terminal of resistor b. the voltage at l can be greater than or less than the voltage at h. current can flow into or out of l. 11 5 wb wiper terminal of resistor b 12 4 hb high terminal of resistor b. the voltage at h can be greater than or less than the voltage at l. current can flow into or out of h. 13 3 la low terminal of resistor a. the voltage at l can be greater than or less than the voltage at h. current can flow into or out of l. 14 2 wa wiper terminal of resistor a 15 1 ha high terminal of resistor a. the voltage at h can be greater than or less than the voltage at l. current can flow into or out of h. ep exposed pad (tqfn only). internally connected to pins 8 and 16. leave unconnected. pin description
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers _______________________________________________________________________________________ 9 write-wiper register (command 00) data written to the write-wiper registers (c1, c0 = 00) controls the wiper positions. the 8 data bits (d7 to d0) indicate the position of the wiper. for example, if din = 0000 0000, the wiper moves to the position closest to l_. if din = 1111 1111, the wiper moves closest to h_. this command writes data to the volatile ram, leaving the nv registers unchanged. when the device powers up, the data stored in the nv registers transfers to the volatile wiper register, moving the wiper to the stored position. write-nv register (command 01) this command (c1, c0 = 01) stores the position of the wipers to the nv registers for use at power-up. alternatively, the ?opy wiper register to nv register command can be used to store the position of the wipers to the nv registers. writing to the nv registers does not affect the position of the wipers. copy wiper register to nv register (command 10) this command (c1, c0 = 10) stores the current position of the wiper to the nv register, for use at power-up. this command may affect one potentiometer at a time, table 1. register map 12345678910111213141516 clock edge c1 c0 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 write wiper register a 00000001d7d6d5d4d3d2d1d0 write wiper register b 00000010d7d6d5d4d3d2d1d0 write nv register a 00010001d7d6d5d4d3d2d1d0 write nv register b 00010010d7d6d5d4d3d2d1d0 copy wiper register a to nv register a 00100001 copy wiper register b to nv register b 00100010 copy both wiper registers to nv registers 00100011 copy nv register a to wiper register a 00110001 copy nv register b to wiper register b 00110010 copy both nv registers to wiper registers 00110011 figure 2. timing diagram cs t cso t css t cl t ch t dh t ds t cp t csh t csw t cs1 sclk din
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers 10 ______________________________________________________________________________________ or both simultaneously, depending on the state of a1 and a0. alternatively, the ?rite nv register?command can be used to store the current position of the wiper to the nv register. copy nv register to wiper register (command 11) this command (c1, c0 = 11) restores the wiper position to the previously stored position in the nv register. this command may affect one potentiometer at a time, or both simultaneously, depending on the state of a1 and a0. nonvolatile memory the internal eeprom consists of a nonvolatile register that retains the last stored value prior to power-down. the nonvolatile register is programmed to midscale at the factory. the nonvolatile memory is guaranteed for 200,000 wiper write cycles and 50 years for wiper data retention. power-up upon power-up, the max5487/max5488/max5489 load the data stored in the nonvolatile wiper register into the volatile memory register, updating the wiper position with the data stored in the nonvolatile wiper register. this initialization period takes 5?. standby the max5487/max5488/max5489 feature a low-power standby mode. when the device is not being pro- grammed, it enters into standby mode and supply cur- rent drops to 0.5? (typ). applications information the max5487/max5488/max5489 are ideal for circuits requiring digitally controlled adjustable resistance, such as lcd contrast control (where voltage biasing adjusts the display contrast), or for programmable fil- ters with adjustable gain and/or cutoff frequency. positive lcd bias control figures 4 and 5 show an application where the max5487/max5488/max5489 provide an adjustable, positive lcd-bias voltage. the op amp provides buffer- ing and gain to the resistor-divider network made by the potentiometer (figure 4) or by a fixed resistor and a variable resistor (figure 5). programmable filter figure 6 shows the max5487/max5488/max5489 in a 1st-order programmable-filter application. adjust the gain of the filter with r 2 , and set the cutoff frequency with r 3 . figure 3. digital-interface format 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 sclk c1 c0 d7 d6 d5 d4 d3 d2 d1 d0 a1 a0 8 7 6 5 4 3 2 1 c1 c0 a1 a0 din sclk cs b) 8-bit command word a) 16-bit command/data word cs din
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers ______________________________________________________________________________________ 11 use the following equations to calculate the gain (a) and the -3db cutoff frequency (f c ): adjustable voltage reference figure 7 shows the max5487/max5488/max5489 used as the feedback resistors in multiple adjustable volt- age-reference applications. independently adjust the output voltages of the max6160s from 1.23v to v in - 0.2v by changing the wiper positions of the max5487/ max5488/max5489. offset voltage and gain adjustment connect the high and low terminals of one potentiome- ter of a max5487/max5488/max5489 to the null inputs of a max410, and connect the wiper to the op amp? positive supply to nullify the offset voltage over the operating temperature range. install the other potentiometer in the feedback path to adjust the gain of the max410 (see figure 8). chip information process: bicmos f rc c = 1 2 3 a r r =+ 1 1 2 figure 4. positive lcd-bias control using a voltage-divider v out 30v 5v w_ h_ l_ max5487 max5488 max5489 max480 figure 5. positive lcd-bias control using a variable resistor v out 30v 5v w_ h_ l_ max5487 max5488 max5489 max480 14 13 12 11 10 9 8 1 2 3 4 5 6 7 v dd sclk din cs hb la wa ha top view max5487 max5488 max5489 n.c. n.c. gnd n.c. lb wb tssop + figure 6. programmable filter 1/2 max5487 1/2 max5488 1/2 max5489 1/2 max5487 1/2 max5488 1/2 max5489 v in r 2 hb wb lb r 1 v out r 3 ha wa la c max410 v+ v- r 2 , r 3 = r hl x d / 256 where r hl = end-to-end resistance and d = decimal value of wiper code pin configurations (continued)
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers 12 ______________________________________________________________________________________ figure 7. adjustable voltage reference max6160 in 5v out adj gnd ha la wa v out1 in out adj gnd hb lb wb v out2 1/2 max5487 1/2 max5488 1/2 max5489 max6160 1/2 max5487 1/2 max5488 1/2 max5489 for the max5487 v out_ = 1.23v x 10k ? r for the max5488 v out_ = 1.23v x 50k ? r for the max5489 v out_ = 1.23v x 100k ? r r 2 = r hl x d / 256 where r hl = end-to-end resistance and d = decimal value of wiper code rr figure 8. offset voltage and gain adjustment 3 2 5v 7 4 1 6 8 max410 ha la wa r2 r1 hb lb wb 1/2 max5487/max5488/max5489 1/2 max5487/max5488/max5489 r 2 = r hl x d / 256 where r hl = end-to-end resistance and = d decimal value of wiper code ordering information (continued) part temp range pin-package end-to-end resistance (k ? ) top mark max5488 ete+ -40? to +85? 16 tqfn-ep* 50 abs max5488eud+ -40? to +85? 14 tssop 50 max5489 ete+ -40? to +85? 16 tqfn-ep* 100 abt MAX5489EUD+ -40? to +85? 14 tssop 100 max5489ete/v+ -40? to +85? 16 tqfn-ep* 100 aie * ep = exposed pad. + denotes a lead(pb)-free/rohs-compliant package. /v denotes an automotive qualified part. package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a ?? ?? or ??in the package code indicates rohs status only. package draw- ings may show a different suffix character, but the drawing per- tains to the package regardless of rohs status. package type package code outline no. land pattern no. 16 tqfn-ep t1633f+3 21-0136 90-0033 14 tssop u14+1 21-0066 90-0113
max5487/max5488/max5489 dual, 256-tap, nonvolatile, spi-interface, linear-taper digital potentiometers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 13 2010 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 3 1/07 1, 8, 12, 15 4 4/10 updated ordering information (added lead-free packaging and automotive qualified part, released tssop package), and updated absolute maximum ratings 1, 2, 12

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